4-bit down binary counterUsing Proteus, design an asynchronous 4-bit down binary counter using JK flip flops as shown in the circuit below. (Use 74HC76 JK flip flop) QA QB QC QDSJ=K=1input countR=1Experiment procedure: a) Start the simulation b) Set all the flip flops by making S=0. Now all the LEDs are ON. c) Now, make S = 1. The LEDs are still ON. e) For every negative clock pulse, the binary output (QD QC QB QA) will decrease by 1 f) Write the binary output, the binary number, and the decimal

Construct a 4-bit Johnson counter using J-K flip-flops. (See Fi... | Filo