Semiconductor Engineering

Quality time?

System-Level Design sat down to discuss the future of verification with Olivier Haller, design verification team leader for STMicroelectronics’ functional verification group; Hillel Miller, functional ...
Design-Reuse

Complex SoC Verification using ARM Processor

Technology evolution, in part, has enabled the transition of multi-million gate designs from large printed circuit boards to SoC (System on Chip). The major advantages of SoC include low cost per gate ...
Business Insider

Compound Photonics Selects Velocity CAE Design-to-Test Tools From Alliance ATE

SANTA CLARA, CA, Nov. 05, 2019 (GLOBE NEWSWIRE) -- via NEWMEDIAWIRE -- Alliance ATE Consulting Group, Inc. announces today that Compound Photonics U.S. Corporation, a global leader and innovator of ...
Electronic Design

Testbench Automation Tool Provides Tight Links To Verilog Simulation

Faster runtime performance, real-time access to built-in Verilog simulation coverage metrics, and a unified graphical environment for waveform analysis are all ...
Design-Reuse

Using Tcl to create a virtual component in Verilog

It has long been a goal to put realistic prototypes or models into system developer's hands as soon as possible. This has been accomplished with FPGAs, C language models and sometimes co-simulation ...
Semiconductor Engineering

Things You Never Knew About System Verilog

System Verilog is considered the current standard for a combined hardware description and verification language, and has been welcomed with open arms since it was approved by IEEE in 2005. Its ...
TechRepublic

Design and Verification of AMBA APB Protocol

The SoC (System on Chip) uses AMBA (Advanced Microcontroller Bus Architecture) as an on-chip bus. APB (Advanced Peripheral Bus) is one of the components of the AMBA bus architecture. APB is low ...