Semiconductor Engineering

Coding And Debugging RISC-V

As monolithic device scaling continues to wind down and evolve toward increasingly heterogeneous designs, it has created an inflection point for chip architects to create customized cores that are ...
EDN

Development environment builds RISC-V code

The Efinity RISC-V Embedded Software IDE from Efinix is an Eclipse-based integrated development environment (IDE) powered by Ashling’s RiscFree IDE. Efinity IDE offers intuitive development and ...
Electronic Design

Techniques to Minimize Code Footprint in RISC-V-Based Apps

RISC-V supported standard extensions. Hints to help the compiler make better decisions. Reasons why to avoid writing "clever code." 1. These are the standard ...
Digital Trends

ARM vs. RISC-V: Is one better than the other?

If you wanted to make a CPU, and you’re not AMD or Intel, there are two real choices: ARM and RISC-V. But what are the differences between the two, and why do companies choose one over the other?
Electronic Design

Working with High-Level-Language Debuggers in RISC-V-Based Apps

What are the RISC-V External Debug Support Version 0.13.2 specifications? Advantages of a using high-level-language debugger. The role of the ubiquitous breakpoints in debugging. How trace is ...
CoinTelegraph

What is RISC-V, and why does Vitalik Buterin want it for Ethereum smart contracts?

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...