This paper describes the development of a Multiprocessor System-on-Chip (MPSoC) with a novel interconnect architecture and an enhanced compiler support for programmability.

Most of the enhancements in the Xtensa-V architecture target multiprocessor designs. Tensilica customers frequently implement three or four Xtensa processors, but they're often unique.

SoC design poses new challenges to chip designers in system architecture definition, logic design, system intellectual-property integration, functional verification, place and route, testing, system ...

MIPS32 1004K coherent processing system is a multithreaded, multiprocessor licensable IP multiprocessor platform that supports up to four single- or double-threaded processor cores connected together ...

Historically, parallel execution and the resulting performance gains have received most of the attention of the engineering community which produced progressive parallel software standards such as ...

The concept of architecture-driven design based on the use of virtual system prototypes (VSPs) is then discussed as a potential solution. Finally, a productivity, development time, and risk comparison ...

For systems that need small memory footprint and deterministicexecution, DSP programmers can use the latest generation of CORBA:CORBA/e (CORBA for embedded). An Object Management Group (OMG)standard, ...

Analog Devices TigerSHARC based systems specialist BittWare has released a multiprocessor operating environment for TigerSHARC processors. Called Trident, it can be used to code, debug, and optimise ...

Multiprocessor real-time systems are central to modern computing, underpinning applications from smart devices to industrial automation. Real-time scheduling in these systems ensures that diverse ...

Dr. Anup Das, the most recent addition to our ECE faculty, is co-author of a new book, "Reliable and Energy Efficient Stream and Multiprocessor Systems," out now from Springer International Publishing ...