EDN

FPGA-to-ASIC conversion a crucial concern

It is clear that FPGAs are great for prototyping and low-volume production. It's also clear, however, that any relatively complex mid- to high-volume design for which power consumption, component cost ...
EDN

An FPGA primer for ASIC designers

With the advent of new technologies in IC design and complexity of the business models, chip designers may want to explore different choices available to them for implementation. ASICs have been the ...
TMCnet

QuickLogic eFPGA Hard IP Selected by Chipus for 12 nm High Performance Data Center ASIC

QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP and ruggedized FPGAs, announced today that its eFPGA Hard IP was selected by Chipus for a high performance data ...
Business Wire

BitHull Overtakes ASIC Market with New FPGA Miners

COPENHAGEN, Denmark--(BUSINESS WIRE)--BitHull S.A. ( www.BitHull.com) is pleased to announce the launch of its two new crypto miners BH Miner and BH Miners Box. These miners have been built around ...
AV Network

Justin Kennington on AV Supply Chain Using FPGA vs. ASIC Chips

SDVoE Alliance President, Justin Kennington shares his perspective on how FPGA versus ASIC chips impacts the product supply chain in the AV industry. When you purchase through links on our site, we ...
Semiconductor Engineering

FPGA And System Designs Get To Market Faster Leveraging ASIC-Proven Analysis Tools

Digital systems need clocks. Today’s designs require more from clocking schemes than ever before, and it’s likely this trend will continue. Increasing power constraints have resulted in finer-grained ...
Electronic Design

ASIC-Style Synthesis Embarks On FPGA World

With as many as 40% of ASIC and ASSP designers doing FPGA prototyping, Synopsys decided to spin a version of its Design Compiler (DC) synthesis tool for FPGA designers. The new tool, dubbed DC FPGA, ...
Electronic Design

Structured ASICs Plan To Outpace FPGAs

Although it lacks the reprogrammability of an FPGA, this structured ASIC promises to deliver 350 MHz of system performance, densities of up to 2.2 million ASIC gates, and 8.8 Mb of memory. System ...
Design-Reuse

Gartner Dataquest analyst gives ASIC, FPGA markets clean bill of health

ANAHEIM, Calif. — The application-specific integrated circuit (ASIC) and field-programmable gate array (FPGA) markets are in good health, according to Bryan Lewis, vice president and chief ...
Semiconductor Engineering

The FPGA Alternative

Until a few years ago, SoC designers focused almost exclusively on ASICs. While it was theoretically possible to create an SoC design for an FPGA, the programmable chips were too bulky and pricey to ...
Design-Reuse

An FPGA primer for ASIC designers

With the advent of new technologies in IC design and complexity of the business models, chip designers may want to explore different choices available to them for implementation. ASICs have been the ...