University of Delaware researchers Satwik Patnaik, Chengmo Yang and Nektarios Tsoutsos are leading an NSF-funded project to build security directly into computer chip design, using artificial ...

As semiconductor technology pushes the boundaries of scale and complexity, traditional VLSI physical design methodologies are struggling to keep pace. The rise of Artificial Intelligence (AI), ...

Modern semiconductor chip design faces growing complexity due to numerous timing scenarios driven by varying operating ...

EDA company’s clients have finished hundreds of new tapeouts using Cadence Cerebrus AI to speed development and make chips that run faster, use less energy, and cost less. For Cadence, AI is all about ...

Synopsys is seeing strong demand for its newer AI technologies in test, verification, manufacturing and analog migration, in addition to the ongoing need for design optimization (DSO.ai). Synopsys was ...

Microsoft has unveiled an in-chip microfluidic cooling system that channels coolant through microscopic pathways etched into ...

Synopsys Inc. today introduced a suite of hardware designs that chipmakers can use to integrate the PCIe 7.0 interconnect technology into their products. According to the company, the suite is the ...

Johns Hopkins electrical and computer engineers are pioneering a new approach to creating neural network chips—neuromorphic accelerators that could power energy-efficient, real-time machine ...

Taking physical design into account as early as possible has been a consideration of chip development teams for quite some time. Still, in interactions with customers and partners, 2022 marked a sharp ...

In the rapidly evolving semiconductor industry, keeping pace with Moore’s Law presents opportunities and challenges, particularly in system-on-chip (SoC) designs. Notably, the number of transistors in ...