Altera Corporation (Nasdaq: ALTR) today announced the release of its Quartus® II software version 11.0, the industry’s number one software in performance and productivity for CPLD, FPGA and HardCopy® ...

Qsys offers memory-mapped and streaming interface support that achieves nearly double the performance of Altera's SOPC Builder tool, while improving system scalability for large FPGA designs and ...

Addition of Altera's SDK for OpenCL to Altera's High-level Design Flows Improves Designer Productivity and Increases System Performance SAN JOSE, Calif., Nov. 19, 2012-- Altera Corporation today ...

Altera Corporation announced the release of its Quartus® II software version 12.1, the industry’s number one design suite in performance and productivity for CPLD, FPGA, SoC FPGA and HardCopy® ASIC ...

San Jose, Calif., November 5 2013—Altera Corporation (NASDAQ: ALTR) today announced the release of its Quartus® II software version 13.1, extending its industry leadership in software productivity ...

Altera claims the latest version of its Quartus II FPGA design software will cut compile times by 30% on average compared to the previous version. In some cases compile time can be cut by up to 70% ...

USA: Altera Corp. released its Quartus II software version 14.0, the FPGA industry's #1 software in performance and productivity. Altera maintains its software leadership position for FPGA and SoC ...

Altera, MIPS Technologies and System Level Solutions have worked together to create a MIPS-based softcore processor for use on Altera’s FPGA and HardCopy Asic devices. Designated the MP32, the ...

SAN JOSE, USA: Altera Corp. released its Quartus II software version 14.0, the FPGA industry's #1 software in performance and productivity. Altera maintains its software leadership position for FPGA ...

According to Altera, version 13.0 of its Quartus II FPGA design software promises a 25% reduction in compile times for 28-nm FPGAs and SoCs, on average, with up to 50% reduction for the most difficult ...